device_batched_gemm_softmax_gemm_xdl_cshuffle.hpp Source File

device_batched_gemm_softmax_gemm_xdl_cshuffle.hpp Source File#

Composable Kernel: device_batched_gemm_softmax_gemm_xdl_cshuffle.hpp Source File
// SPDX-License-Identifier: MIT
// Copyright (c) 2018-2025, Advanced Micro Devices, Inc. All rights reserved.
 
#pragma once
#ifndef __HIPCC_RTC__
#include <iostream>
#include <sstream>
#endif
 
#include "ck/utility/common_header.hpp"
#ifndef __HIPCC_RTC__
#include "ck/host_utility/device_prop.hpp"
#include "ck/host_utility/kernel_launch.hpp"
#endif
 
#include "ck/tensor_description/tensor_descriptor.hpp"
#include "ck/tensor_description/tensor_descriptor_helper.hpp"
#include "ck/tensor_operation/gpu/device/tensor_layout.hpp"
#include "ck/tensor_operation/gpu/device/device_batched_gemm_softmax_gemm.hpp"
#include "ck/tensor_operation/gpu/device/gemm_specialization.hpp"
#include "ck/tensor_operation/gpu/device/masking_specialization.hpp"
#include "ck/tensor_operation/gpu/device/matrix_padder.hpp"
#include "ck/tensor_operation/gpu/grid/gridwise_batched_gemm_softmax_gemm_xdl_cshuffle_v1.hpp"
 
namespace ck {
namespace tensor_operation {
namespace device {
 
template <typename GridwiseGemm,
          typename FloatAB,
          typename FloatC,
          typename AElementwiseOperation,
          typename BElementwiseOperation,
          typename AccElementwiseOperation,
          typename B1ElementwiseOperation,
          typename CElementwiseOperation,
          typename AGridDesc_AK0_M_AK1,
          typename BGridDesc_BK0_N_BK1,
          typename B1GridDesc_BK0_N_BK1,
          typename CGridDescriptor_MBlock_MPerBlock_NBlock_NPerBlock,
          typename Block2CTileMap,
          typename ComputeBasePtrOfStridedBatch,
          typename C0MatrixMask,
          bool HasMainKBlockLoop>
__global__ void
#if CK_USE_LAUNCH_BOUNDS
__launch_bounds__(CK_MAX_THREAD_PER_BLOCK, CK_MIN_BLOCK_PER_CU)
#endif
    kernel_batched_gemm_softmax_gemm_xdl_cshuffle_v1(
        const FloatAB* __restrict__ p_a_grid,
        const FloatAB* __restrict__ p_b_grid,
        const FloatAB* __restrict__ p_b1_grid,
        FloatC* __restrict__ p_c_grid,
        const AElementwiseOperation a_element_op,
        const BElementwiseOperation b_element_op,
        const AccElementwiseOperation acc_element_op,
        const B1ElementwiseOperation b1_element_op,
        const CElementwiseOperation c_element_op,
        const AGridDesc_AK0_M_AK1 a_grid_desc_ak0_m_ak1,
        const BGridDesc_BK0_N_BK1 b_grid_desc_bk0_n_bk1,
        const B1GridDesc_BK0_N_BK1 b1_grid_desc_bk0_n_bk1,
        const CGridDescriptor_MBlock_MPerBlock_NBlock_NPerBlock
            c_grid_desc_mblock_mperblock_nblock_nperblock,
        const Block2CTileMap block_2_ctile_map,
        const index_t batch_count,
        const ComputeBasePtrOfStridedBatch compute_base_ptr_of_batch,
        const C0MatrixMask c0_matrix_mask)
{
#if defined(__gfx9__) || defined(__gfx11__) || defined(__gfx12__)
    if constexpr(GridwiseGemm::template IsValidCompilationParameter<>())
    {
        __shared__ char p_shared[GridwiseGemm::GetSharedMemoryNumberOfByte()];
        const index_t num_blocks_per_batch =
            __builtin_amdgcn_readfirstlane(get_grid_size() / batch_count);
        const index_t g_idx =
            __builtin_amdgcn_readfirstlane(get_block_1d_id() / num_blocks_per_batch);
 
        const long_index_t a_batch_offset = __builtin_amdgcn_readfirstlane(
            static_cast<long_index_t>(compute_base_ptr_of_batch.GetABasePtr(g_idx)));
        const long_index_t b_batch_offset = __builtin_amdgcn_readfirstlane(
            static_cast<long_index_t>(compute_base_ptr_of_batch.GetBBasePtr(g_idx)));
        const long_index_t b1_batch_offset = __builtin_amdgcn_readfirstlane(
            static_cast<long_index_t>(compute_base_ptr_of_batch.GetB1BasePtr(g_idx)));
        const long_index_t c_batch_offset = __builtin_amdgcn_readfirstlane(
            static_cast<long_index_t>(compute_base_ptr_of_batch.GetCBasePtr(g_idx)));
 
        GridwiseGemm::template Run<HasMainKBlockLoop>(p_a_grid + a_batch_offset,
                                                      p_b_grid + b_batch_offset,
                                                      p_b1_grid + b1_batch_offset,
                                                      p_c_grid + c_batch_offset,
                                                      p_shared,
                                                      a_element_op,
                                                      b_element_op,
                                                      acc_element_op,
                                                      b1_element_op,
                                                      c_element_op,
                                                      a_grid_desc_ak0_m_ak1,
                                                      b_grid_desc_bk0_n_bk1,
                                                      b1_grid_desc_bk0_n_bk1,
                                                      c_grid_desc_mblock_mperblock_nblock_nperblock,
                                                      block_2_ctile_map,
                                                      c0_matrix_mask);
    }
#else
    ignore = p_a_grid;
    ignore = p_b_grid;
    ignore = p_b1_grid;
    ignore = p_c_grid;
    ignore = a_element_op;
    ignore = b_element_op;
    ignore = acc_element_op;
    ignore = b1_element_op;
    ignore = c_element_op;
    ignore = a_grid_desc_ak0_m_ak1;
    ignore = b_grid_desc_bk0_n_bk1;
    ignore = b1_grid_desc_bk0_n_bk1;
    ignore = c_grid_desc_mblock_mperblock_nblock_nperblock;
    ignore = block_2_ctile_map;
    ignore = batch_count;
    ignore = compute_base_ptr_of_batch;
    ignore = c0_matrix_mask;
#endif // end of if (defined(__gfx9__))
}
 
// Computes C = A * B0 * B1
//              ^^^^^^ (Acc0)
//              ^^^^^^^^^^^ (Acc1)
 
// When using NPadding as GemmSpecialization, AccElementwiseOperation should be set to
// ScaleAndResetNaNToMinusInfinity.
// if !isNan(AccElement)
//     AccElement *= scale
// else
//     AccElement = -INFINITY
// Otherwise, result may be wrong.
 
template <typename ALayout,
          typename BLayout, // B0Layout
          typename B1Layout,
          typename CLayout,
          typename ADataType,
          typename BDataType,
          typename B1DataType,
          typename CDataType,
          typename GemmAccDataType,
          typename CShuffleDataType,
          typename AElementwiseOperation,
          typename BElementwiseOperation,
          typename AccElementwiseOperation,
          typename B1ElementwiseOperation,
          typename CElementwiseOperation,
          GemmSpecialization GemmSpec,
          index_t NumGemmKPrefetchStage,
          index_t BlockSize,
          index_t MPerBlock,
          index_t NPerBlock, // Gemm0NPerBlock
          index_t KPerBlock, // Gemm0KPerBlock
          index_t Gemm1NPerBlock,
          index_t Gemm1KPerBlock,
          index_t AK1,
          index_t BK1,
          index_t B1K1,
          index_t MPerXDL,
          index_t NPerXDL,
          index_t MXdlPerWave,
          index_t NXdlPerWave,
          index_t Gemm1NXdlPerWave,
          typename ABlockTransferThreadClusterLengths_AK0_M_AK1,
          typename ABlockTransferThreadClusterArrangeOrder,
          typename ABlockTransferSrcAccessOrder,
          index_t ABlockTransferSrcVectorDim,
          index_t ABlockTransferSrcScalarPerVector,
          index_t ABlockTransferDstScalarPerVector_AK1,
          bool ABlockLdsExtraM,
          typename BBlockTransferThreadClusterLengths_BK0_N_BK1,
          typename BBlockTransferThreadClusterArrangeOrder,
          typename BBlockTransferSrcAccessOrder,
          index_t BBlockTransferSrcVectorDim,
          index_t BBlockTransferSrcScalarPerVector,
          index_t BBlockTransferDstScalarPerVector_BK1,
          bool BBlockLdsExtraN,
          typename B1BlockTransferThreadClusterLengths_BK0_N_BK1,
          typename B1BlockTransferThreadClusterArrangeOrder,
          typename B1BlockTransferSrcAccessOrder,
          index_t B1BlockTransferSrcVectorDim,
          index_t B1BlockTransferSrcScalarPerVector,
          index_t B1BlockTransferDstScalarPerVector_BK1,
          bool B1BlockLdsExtraN,
          index_t CShuffleMXdlPerWavePerShuffle,
          index_t CShuffleNXdlPerWavePerShuffle,
          typename CShuffleBlockTransferClusterLengths_MBlock_MPerBlock_NBlock_NPerBlock,
          index_t CShuffleBlockTransferScalarPerVector_NPerBlock,
          bool MaskOutUpperTriangle,
          LoopScheduler LoopSched = LoopScheduler::Default>
struct DeviceBatchedGemmSoftmaxGemm_Xdl_CShuffle
    : public DeviceBatchedGemmSoftmaxGemm<ALayout,
                                          BLayout,
                                          B1Layout,
                                          CLayout,
                                          ADataType,
                                          BDataType,
                                          B1DataType,
                                          CDataType,
                                          AElementwiseOperation,
                                          BElementwiseOperation,
                                          AccElementwiseOperation,
                                          B1ElementwiseOperation,
                                          CElementwiseOperation,
                                          MaskOutUpperTriangle>
{
 
    using DeviceOp = DeviceBatchedGemmSoftmaxGemm_Xdl_CShuffle;
    static constexpr auto MXdlPerWave64 =
        GetNXdlPerWave2<BlockSize, NPerBlock, MPerBlock, NPerXDL, MPerXDL, NXdlPerWave, true>();
    static constexpr auto MXdlPerWave32 =
        GetNXdlPerWave2<BlockSize, NPerBlock, MPerBlock, NPerXDL, MPerXDL, NXdlPerWave, false>();
 
    static constexpr auto I0 = Number<0>{};
    static constexpr auto I1 = Number<1>{};
    static constexpr auto I2 = Number<2>{};
 
    static constexpr auto matrix_padder =
        GemmGemmPadder<GemmSpec, index_t, index_t, index_t, index_t>{
            MPerBlock, NPerBlock, KPerBlock, Gemm1NPerBlock};
 
    static auto MakeAGridDescriptor_AK0_M_AK1(index_t MRaw, index_t KRaw, index_t StrideA)
    {
        const auto a_grid_desc_mraw_kraw = [&]() {
            if constexpr(is_same_v<tensor_layout::gemm::RowMajor, ALayout>)
            {
                return make_naive_tensor_descriptor(make_tuple(MRaw, KRaw),
                                                    make_tuple(StrideA, I1));
            }
            else if constexpr(is_same_v<tensor_layout::gemm::ColumnMajor, ALayout>)
            {
                return make_naive_tensor_descriptor(make_tuple(MRaw, KRaw),
                                                    make_tuple(I1, StrideA));
            }
        }();
 
        const auto a_grid_desc_m_k = matrix_padder.PadADescriptor_M_K(a_grid_desc_mraw_kraw);
 
        const auto M = a_grid_desc_m_k.GetLength(I0);
        const auto K = a_grid_desc_m_k.GetLength(I1);
 
        const auto AK0 = K / AK1;
 
        return transform_tensor_descriptor(a_grid_desc_m_k,
                                           make_tuple(make_unmerge_transform(make_tuple(AK0, AK1)),
                                                      make_pass_through_transform(M)),
                                           make_tuple(Sequence<1>{}, Sequence<0>{}),
                                           make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
    }
 
    static auto MakeBGridDescriptor_BK0_N_BK1(index_t KRaw, index_t NRaw, index_t StrideB)
    {
        const auto b_grid_desc_nraw_kraw = [&]() {
            if constexpr(is_same<tensor_layout::gemm::RowMajor, BLayout>::value)
            {
                return make_naive_tensor_descriptor(make_tuple(NRaw, KRaw),
                                                    make_tuple(I1, StrideB));
            }
            else if constexpr(is_same<tensor_layout::gemm::ColumnMajor, BLayout>::value)
            {
                return make_naive_tensor_descriptor(make_tuple(NRaw, KRaw),
                                                    make_tuple(StrideB, I1));
            }
        }();
 
        const auto b_grid_desc_n_k = matrix_padder.PadBDescriptor_N_K(b_grid_desc_nraw_kraw);
 
        const auto N = b_grid_desc_n_k.GetLength(I0);
        const auto K = b_grid_desc_n_k.GetLength(I1);
 
        const auto BK0 = K / BK1;
 
        return transform_tensor_descriptor(b_grid_desc_n_k,
                                           make_tuple(make_unmerge_transform(make_tuple(BK0, BK1)),
                                                      make_pass_through_transform(N)),
                                           make_tuple(Sequence<1>{}, Sequence<0>{}),
                                           make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
    }
 
    // Args: Gemm1KRaw, Gemm1NRaw, StrideB1
    static auto MakeB1GridDescriptor_BK0_N_BK1(index_t KRaw, index_t NRaw, index_t StrideB)
    {
        const auto b1_grid_desc_nraw_kraw = [&]() {
            if constexpr(is_same<tensor_layout::gemm::RowMajor, B1Layout>::value)
            {
                return make_naive_tensor_descriptor(make_tuple(NRaw, KRaw),
                                                    make_tuple(I1, StrideB));
            }
            else if constexpr(is_same<tensor_layout::gemm::ColumnMajor, B1Layout>::value)
            {
                return make_naive_tensor_descriptor(make_tuple(NRaw, KRaw),
                                                    make_tuple(StrideB, I1));
            }
        }();
 
        const auto b1_grid_desc_n_k = matrix_padder.PadB1Descriptor_N_K(b1_grid_desc_nraw_kraw);
 
        const auto N = b1_grid_desc_n_k.GetLength(I0);
        const auto K = b1_grid_desc_n_k.GetLength(I1);
 
        const auto B1K0 = K / B1K1;
 
        return transform_tensor_descriptor(
            b1_grid_desc_n_k,
            make_tuple(make_unmerge_transform(make_tuple(B1K0, B1K1)),
                       make_pass_through_transform(N)),
            make_tuple(Sequence<1>{}, Sequence<0>{}),
            make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
    }
 
    static auto MakeCGridDescriptor_M_N(index_t MRaw, index_t NRaw, index_t StrideC)
    {
        const auto c_grid_desc_mraw_nraw = [&]() {
            if constexpr(is_same<tensor_layout::gemm::RowMajor, CLayout>::value)
            {
                return make_naive_tensor_descriptor(make_tuple(MRaw, NRaw),
                                                    make_tuple(StrideC, I1));
            }
            else if constexpr(is_same<tensor_layout::gemm::ColumnMajor, CLayout>::value)
            {
                return make_naive_tensor_descriptor(make_tuple(MRaw, NRaw),
                                                    make_tuple(I1, StrideC));
            }
        }();
 
        return matrix_padder.PadCDescriptor_M_N(c_grid_desc_mraw_nraw);
    }
 
    struct ComputeBasePtrOfStridedBatch
    {
        ComputeBasePtrOfStridedBatch(index_t BatchStrideA,
                                     index_t BatchStrideB,
                                     index_t BatchStrideB1,
                                     index_t BatchStrideC)
            : BatchStrideA_(BatchStrideA),
              BatchStrideB_(BatchStrideB),
              BatchStrideB1_(BatchStrideB1),
              BatchStrideC_(BatchStrideC)
        {
        }
 
        __host__ __device__ constexpr long_index_t GetABasePtr(index_t g_idx) const
        {
            return g_idx * static_cast<long_index_t>(BatchStrideA_);
        }
 
        __host__ __device__ constexpr long_index_t GetBBasePtr(index_t g_idx) const
        {
            return g_idx * static_cast<long_index_t>(BatchStrideB_);
        }
 
        __host__ __device__ constexpr long_index_t GetB1BasePtr(index_t g_idx) const
        {
            return g_idx * static_cast<long_index_t>(BatchStrideB1_);
        }
 
        __host__ __device__ constexpr long_index_t GetCBasePtr(index_t g_idx) const
        {
            return g_idx * static_cast<long_index_t>(BatchStrideC_);
        }
 
        private:
        index_t BatchStrideA_;
        index_t BatchStrideB_;
        index_t BatchStrideB1_;
        index_t BatchStrideC_;
    };
 
    using AGridDesc_AK0_M_AK1  = decltype(MakeAGridDescriptor_AK0_M_AK1(1, 1, 1));
    using BGridDesc_BK0_N_BK1  = decltype(MakeBGridDescriptor_BK0_N_BK1(1, 1, 1));
    using B1GridDesc_BK0_N_BK1 = decltype(MakeB1GridDescriptor_BK0_N_BK1(1, 1, 1));
    using CGridDesc_M_N        = decltype(MakeCGridDescriptor_M_N(1, 1, 1));
 
    using C0MatrixMask = conditional_t<MaskOutUpperTriangle,
                                       C0MatrixMask_impl<MaskOutUpperTrianglePredicate>,
                                       C0MatrixMask_impl<MaskDisabledPredicate>>;
 
    // GridwiseGemm
    template <index_t MXdlPerWave_>
    using GridwiseGemmBase = GridwiseBatchedGemmSoftmaxGemm_Xdl_CShuffle<
        ADataType, // TODO: distinguish A/B datatype
        GemmAccDataType,
        CShuffleDataType,
        CDataType,
        AElementwiseOperation,
        BElementwiseOperation,
        AccElementwiseOperation,
        B1ElementwiseOperation,
        CElementwiseOperation,
        InMemoryDataOperationEnum::Set,
        AGridDesc_AK0_M_AK1,
        BGridDesc_BK0_N_BK1,
        B1GridDesc_BK0_N_BK1,
        CGridDesc_M_N,
        NumGemmKPrefetchStage,
        BlockSize,
        MPerBlock,
        NPerBlock,
        KPerBlock,
        Gemm1NPerBlock,
        Gemm1KPerBlock,
        AK1,
        BK1,
        B1K1,
        MPerXDL,
        NPerXDL,
        MXdlPerWave_,
        NXdlPerWave,
        Gemm1NXdlPerWave,
        ABlockTransferThreadClusterLengths_AK0_M_AK1,
        ABlockTransferThreadClusterArrangeOrder,
        ABlockTransferSrcAccessOrder,
        ABlockTransferSrcVectorDim,
        ABlockTransferSrcScalarPerVector,
        ABlockTransferDstScalarPerVector_AK1,
        true,
        ABlockLdsExtraM,
        BBlockTransferThreadClusterLengths_BK0_N_BK1,
        BBlockTransferThreadClusterArrangeOrder,
        BBlockTransferSrcAccessOrder,
        BBlockTransferSrcVectorDim,
        BBlockTransferSrcScalarPerVector,
        BBlockTransferDstScalarPerVector_BK1,
        true,
        BBlockLdsExtraN,
        B1BlockTransferThreadClusterLengths_BK0_N_BK1,
        B1BlockTransferThreadClusterArrangeOrder,
        B1BlockTransferSrcAccessOrder,
        B1BlockTransferSrcVectorDim,
        B1BlockTransferSrcScalarPerVector,
        B1BlockTransferDstScalarPerVector_BK1,
        false,
        B1BlockLdsExtraN,
        CShuffleMXdlPerWavePerShuffle,
        CShuffleNXdlPerWavePerShuffle,
        CShuffleBlockTransferClusterLengths_MBlock_MPerBlock_NBlock_NPerBlock,
        CShuffleBlockTransferScalarPerVector_NPerBlock,
        LoopSched,
        matrix_padder.PadN,
        MaskOutUpperTriangle>;
    using GridwiseGemm64 = GridwiseGemmBase<math::max(MXdlPerWave64, 1)>;
    using GridwiseGemm32 = GridwiseGemmBase<MXdlPerWave32>;
 
#ifndef __HIPCC_RTC__
    // Argument
    struct Argument : public BaseArgument
    {
        Argument(const ADataType* p_a_grid,
                 const BDataType* p_b_grid,
                 const B1DataType* p_b1_grid,
                 CDataType* p_c_grid,
                 index_t MRaw,
                 index_t NRaw,
                 index_t KRaw,
                 index_t Gemm1NRaw, // = ORaw
                 index_t Batch,
                 index_t StrideA,
                 index_t StrideB,
                 index_t StrideB1,
                 index_t StrideC,
                 index_t BatchStrideA,
                 index_t BatchStrideB,
                 index_t BatchStrideB1,
                 index_t BatchStrideC,
                 AElementwiseOperation a_element_op,
                 BElementwiseOperation b_element_op,
                 AccElementwiseOperation acc_element_op,
                 B1ElementwiseOperation b1_element_op,
                 CElementwiseOperation c_element_op)
            : p_a_grid_{p_a_grid},
              p_b_grid_{p_b_grid},
              p_b1_grid_{p_b1_grid},
              p_c_grid_{p_c_grid},
              a_grid_desc_ak0_m_ak1_{DeviceOp::MakeAGridDescriptor_AK0_M_AK1(MRaw, KRaw, StrideA)},
              b_grid_desc_bk0_n_bk1_{DeviceOp::MakeBGridDescriptor_BK0_N_BK1(KRaw, NRaw, StrideB)},
              b1_grid_desc_bk0_n_bk1_{
                  DeviceOp::MakeB1GridDescriptor_BK0_N_BK1(NRaw, Gemm1NRaw, StrideB1)},
              c_grid_desc_m_n_{DeviceOp::MakeCGridDescriptor_M_N(MRaw, Gemm1NRaw, StrideC)},
              block_2_ctile_map_{GridwiseGemm64::MakeDefaultBlock2CTileMap(c_grid_desc_m_n_)},
              a_element_op_{a_element_op},
              b_element_op_{b_element_op},
              acc_element_op_{acc_element_op},
              b1_element_op_{b1_element_op},
              c_element_op_{c_element_op},
              batch_count_(Batch),
              compute_base_ptr_of_batch_{BatchStrideA, BatchStrideB, BatchStrideB1, BatchStrideC},
              c0_matrix_mask_{NRaw},
              raw_lengths_m_n_k_o_{MRaw, NRaw, KRaw, Gemm1NRaw}
        {
        }
 
        //  private:
        const ADataType* p_a_grid_;
        const BDataType* p_b_grid_;
        const B1DataType* p_b1_grid_;
        CDataType* p_c_grid_;
        AGridDesc_AK0_M_AK1 a_grid_desc_ak0_m_ak1_;
        BGridDesc_BK0_N_BK1 b_grid_desc_bk0_n_bk1_;
        B1GridDesc_BK0_N_BK1 b1_grid_desc_bk0_n_bk1_;
        CGridDesc_M_N c_grid_desc_m_n_;
        typename GridwiseGemm64::DefaultBlock2CTileMap block_2_ctile_map_;
        AElementwiseOperation a_element_op_;
        BElementwiseOperation b_element_op_;
        AccElementwiseOperation acc_element_op_;
        B1ElementwiseOperation b1_element_op_;
        CElementwiseOperation c_element_op_;
        index_t batch_count_;
        ComputeBasePtrOfStridedBatch compute_base_ptr_of_batch_;
 
        // check C0 masking and padding
        C0MatrixMask c0_matrix_mask_;
 
        // For robust IsSupportedArgument() check
        std::vector<index_t> raw_lengths_m_n_k_o_;
    };
 
    // Invoker
    struct Invoker : public BaseInvoker
    {
        using Argument = DeviceOp::Argument;
 
        template <typename GridwiseGemm>
        float RunImp(const Argument& arg, const StreamConfig& stream_config = StreamConfig{})
        {
            if(!GridwiseGemm::CheckValidity(arg.a_grid_desc_ak0_m_ak1_,
                                            arg.b_grid_desc_bk0_n_bk1_,
                                            arg.b1_grid_desc_bk0_n_bk1_,
                                            arg.c_grid_desc_m_n_,
                                            arg.block_2_ctile_map_))
            {
                throw std::runtime_error("wrong! GridwiseGemm has invalid setting");
            }
            auto c_grid_desc_mblock_mperblock_nblock_nperblock =
                GridwiseGemm::MakeCGridDescriptor_MBlock_MPerBlock_NBlock_NPerBlock(
                    arg.c_grid_desc_m_n_);
            const index_t grid_size =
                arg.block_2_ctile_map_.CalculateGridSize(arg.c_grid_desc_m_n_) * arg.batch_count_;
 
            // Gemm0_K
            const auto K =
                arg.a_grid_desc_ak0_m_ak1_.GetLength(I0) * arg.a_grid_desc_ak0_m_ak1_.GetLength(I2);
 
            float ave_time = 0;
 
            auto launch_kernel = [&](auto has_main_k_block_loop_) {
                const auto kernel = kernel_batched_gemm_softmax_gemm_xdl_cshuffle_v1<
                    GridwiseGemm,
                    ADataType, // TODO: distiguish A/B datatype
                    CDataType,
                    AElementwiseOperation,
                    BElementwiseOperation,
                    AccElementwiseOperation,
                    B1ElementwiseOperation,
                    CElementwiseOperation,
                    DeviceOp::AGridDesc_AK0_M_AK1,
                    DeviceOp::BGridDesc_BK0_N_BK1,
                    DeviceOp::B1GridDesc_BK0_N_BK1,
                    typename GridwiseGemm::CGridDescriptor_MBlock_MPerBlock_NBlock_NPerBlock,
                    typename GridwiseGemm::DefaultBlock2CTileMap,
                    ComputeBasePtrOfStridedBatch,
                    C0MatrixMask,
                    has_main_k_block_loop_>;
 
                return launch_and_time_kernel(stream_config,
                                              kernel,
                                              dim3(grid_size),
                                              dim3(BlockSize),
                                              0,
                                              arg.p_a_grid_,
                                              arg.p_b_grid_,
                                              arg.p_b1_grid_,
                                              arg.p_c_grid_,
                                              arg.a_element_op_,
                                              arg.b_element_op_,
                                              arg.acc_element_op_,
                                              arg.b1_element_op_,
                                              arg.c_element_op_,
                                              arg.a_grid_desc_ak0_m_ak1_,
                                              arg.b_grid_desc_bk0_n_bk1_,
                                              arg.b1_grid_desc_bk0_n_bk1_,
                                              c_grid_desc_mblock_mperblock_nblock_nperblock,
                                              arg.block_2_ctile_map_,
                                              arg.batch_count_,
                                              arg.compute_base_ptr_of_batch_,
                                              arg.c0_matrix_mask_);
            };
 
            // Gemm1_K is split into Gemm1_K0/K1 where K1 is known at compile time, so we only need
            // to concern Gemm0's loop
            if(GridwiseGemm::CalculateHasMainKBlockLoop(K))
            {
                ave_time = launch_kernel(integral_constant<bool, true>{});
            }
            else
            {
                ave_time = launch_kernel(integral_constant<bool, false>{});
            }
 
            return ave_time;
        }
 
        float Run(const Argument& arg, const StreamConfig& stream_config = StreamConfig{})
        {
            if(get_warp_size() == 64)
            {
                if constexpr(MXdlPerWave64 > 0)
                {
                    return RunImp<GridwiseGemm64>(arg, stream_config);
                }
            }
            else
            {
                if constexpr(MXdlPerWave32 > 0)
                {
                    return RunImp<GridwiseGemm32>(arg, stream_config);
                }
            }
            return 0;
        }
 
        // polymorphic
        float Run(const BaseArgument* p_arg,
                  const StreamConfig& stream_config = StreamConfig{}) override
        {
            return Run(*dynamic_cast<const Argument*>(p_arg), stream_config);
        }
    };
#endif
 
    static constexpr bool IsValidCompilationParameter()
    {
        // TODO: properly implement this check
        return true;
    }
 
    static constexpr bool
    IsSupported(index_t MRaw_, index_t NRaw_, index_t KRaw_, index_t Gemm1NRaw_)
    {
        // check vector load/store
        using Row = ck::tensor_layout::gemm::RowMajor;
        using Col = ck::tensor_layout::gemm::ColumnMajor;
 
        // check vector load of A
        if constexpr(is_same_v<ALayout, Row>)
        {
            if(KRaw_ % ABlockTransferSrcScalarPerVector != 0)
            {
                return false;
            }
        }
        else if constexpr(is_same_v<ALayout, Col>)
        {
            if(MRaw_ % ABlockTransferSrcScalarPerVector != 0)
            {
                return false;
            }
        }
        else
        {
            return false;
        }
 
        // check vector load of B
        if constexpr(is_same_v<BLayout, Row>)
        {
            if(NRaw_ % BBlockTransferSrcScalarPerVector != 0)
            {
                return false;
            }
        }
        else if constexpr(is_same_v<BLayout, Col>)
        {
            if(KRaw_ % BBlockTransferSrcScalarPerVector != 0)
            {
                return false;
            }
        }
        else
        {
            return false;
        }
 
        // check vector load of B1
        if constexpr(is_same_v<B1Layout, Row>)
        {
            if(Gemm1NRaw_ % B1BlockTransferSrcScalarPerVector != 0)
            {
                return false;
            }
        }
        else if constexpr(is_same_v<B1Layout, Col>)
        {
            if(NRaw_ % B1BlockTransferSrcScalarPerVector != 0)
            {
                return false;
            }
        }
        else
        {
            return false;
        }
 
        // check vector load of C
        if constexpr(is_same_v<CLayout, Row>)
        {
            if(Gemm1NRaw_ % CShuffleBlockTransferScalarPerVector_NPerBlock != 0)
            {
                return false;
            }
        }
        else if constexpr(is_same_v<CLayout, Col>)
        {
            if(MRaw_ % CShuffleBlockTransferScalarPerVector_NPerBlock != 0)
            {
                return false;
            }
        }
        else
        {
            return false;
        }
 
        return true;
    }
 
#ifndef __HIPCC_RTC__
    static bool IsSupportedArgument(const Argument& arg)
    {
        if(!ck::is_xdl_wmma_supported<ADataType, BDataType, MPerXDL, NPerXDL>())
        {
            return false;
        }
        // Note: we need raw lengths since threadwise copy can not handle vector load when part of
        // vector is out of bounds
        const auto MRaw      = arg.raw_lengths_m_n_k_o_[0];
        const auto NRaw      = arg.raw_lengths_m_n_k_o_[1];
        const auto KRaw      = arg.raw_lengths_m_n_k_o_[2];
        const auto Gemm1NRaw = arg.raw_lengths_m_n_k_o_[3];
 
        if(get_warp_size() == 64)
        {
            if constexpr(MXdlPerWave64 > 0)
            {
                return GridwiseGemm64::CheckValidity(arg.a_grid_desc_ak0_m_ak1_,
                                                     arg.b_grid_desc_bk0_n_bk1_,
                                                     arg.b1_grid_desc_bk0_n_bk1_,
                                                     arg.c_grid_desc_m_n_,
                                                     arg.block_2_ctile_map_) and
                       IsSupported(MRaw, NRaw, KRaw, Gemm1NRaw);
            }
        }
        else
        {
            if constexpr(MXdlPerWave32 > 0)
            {
                return GridwiseGemm32::CheckValidity(arg.a_grid_desc_ak0_m_ak1_,
                                                     arg.b_grid_desc_bk0_n_bk1_,
                                                     arg.b1_grid_desc_bk0_n_bk1_,
                                                     arg.c_grid_desc_m_n_,
                                                     arg.block_2_ctile_map_) and
                       IsSupported(MRaw, NRaw, KRaw, Gemm1NRaw);
            }
        }
        return false;
    }
 
    // polymorphic
    bool IsSupportedArgument(const BaseArgument* p_arg) override
    {
        return IsSupportedArgument(*dynamic_cast<const Argument*>(p_arg));
    }
 
    static auto MakeArgument(const ADataType* p_a,
                             const BDataType* p_b,
                             const B1DataType* p_b1,
                             CDataType* p_c,
                             index_t MRaw,
                             index_t NRaw,
                             index_t KRaw,
                             index_t Gemm1NRaw,
                             index_t Batch,
                             index_t StrideA,
                             index_t StrideB,
                             index_t StrideB1,
                             index_t StrideC,
                             index_t BatchStrideA,
                             index_t BatchStrideB,
                             index_t BatchStrideB1,
                             index_t BatchStrideC,
                             AElementwiseOperation a_element_op,
                             BElementwiseOperation b_element_op,
                             AccElementwiseOperation acc_element_op,
                             B1ElementwiseOperation b1_element_op,
                             CElementwiseOperation c_element_op)
    {
        return Argument{p_a,           p_b,          p_b1,         p_c,          MRaw,
                        NRaw,          KRaw,         Gemm1NRaw,    Batch,        StrideA,
                        StrideB,       StrideB1,     StrideC,      BatchStrideA, BatchStrideB,
                        BatchStrideB1, BatchStrideC, a_element_op, b_element_op, acc_element_op,
                        b1_element_op, c_element_op};
    }
 
    static auto MakeInvoker() { return Invoker{}; }
 
    // polymorphic
    std::unique_ptr<BaseArgument> MakeArgumentPointer(const void* p_a,
                                                      const void* p_b,
                                                      const void* p_b1,
                                                      void* p_c,
                                                      index_t MRaw,
                                                      index_t NRaw,
                                                      index_t KRaw,
                                                      index_t Gemm1NRaw,
                                                      index_t Batch,
                                                      index_t StrideA,
                                                      index_t StrideB,
                                                      index_t StrideB1,
                                                      index_t StrideC,
                                                      index_t BatchStrideA,
                                                      index_t BatchStrideB,
                                                      index_t BatchStrideB1,
                                                      index_t BatchStrideC,
                                                      AElementwiseOperation a_element_op,
                                                      BElementwiseOperation b_element_op,
                                                      AccElementwiseOperation acc_element_op,
                                                      B1ElementwiseOperation b1_element_op,
                                                      CElementwiseOperation c_element_op) override
    {
        return std::make_unique<Argument>(static_cast<const ADataType*>(p_a),
                                          static_cast<const BDataType*>(p_b),
                                          static_cast<const B1DataType*>(p_b1),
                                          static_cast<CDataType*>(p_c),
                                          MRaw,
                                          NRaw,
                                          KRaw,
                                          Gemm1NRaw,
                                          Batch,
                                          StrideA,
                                          StrideB,
                                          StrideB1,
                                          StrideC,
                                          BatchStrideA,
                                          BatchStrideB,
                                          BatchStrideB1,
                                          BatchStrideC,
                                          a_element_op,
                                          b_element_op,
                                          acc_element_op,
                                          b1_element_op,
                                          c_element_op);
    }
 
    // polymorphic
    std::unique_ptr<BaseInvoker> MakeInvokerPointer() override
    {
        return std::make_unique<Invoker>(Invoker{});
    }
 
    // polymorphic
    std::string GetTypeString() const override
    {
        auto str = std::stringstream();
 
        // clang-format off
        str << "DeviceBatchedGemmSoftmaxGemm_Xdl_CShuffle"
            << "<"
            << BlockSize << ", "
            << MPerBlock << ", "
            << NPerBlock << ", "
            << KPerBlock << ", "
            << AK1 << ", "
            << BK1 << ", "
            << MPerBlock << ", "
            << Gemm1NPerBlock << ", "
            << Gemm1KPerBlock << ", "
            << B1K1 << ", "
            << getGemmSpecializationString(GemmSpec) << ">";
        // clang-format on
 
        return str.str();
    }
#endif
 
    template <class ADesc, class BDesc, class B1Desc, class CDesc>
    struct Descriptor
    {
        template <class AGridDescriptor>
        static constexpr auto MakeAGridDescriptor_AK0_M_AK1(const AGridDescriptor& a_grid_desc)
        {
            const auto a_grid_desc_m_k = DeviceOp::matrix_padder.PadADescriptor_M_K(a_grid_desc);
 
            const auto M = a_grid_desc_m_k.GetLength(I0);
            const auto K = a_grid_desc_m_k.GetLength(I1);
 
            const auto AK0 = K / AK1;
 
            return transform_tensor_descriptor(
                a_grid_desc_m_k,
                make_tuple(make_unmerge_transform(make_tuple(AK0, AK1)),
                           make_pass_through_transform(M)),
                make_tuple(Sequence<1>{}, Sequence<0>{}),
                make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
        }
 
        template <class BGridDescriptor>
        static constexpr auto MakeBGridDescriptor_BK0_N_BK1(const BGridDescriptor& b_grid_desc)
        {
            const auto b_grid_desc_n_k = DeviceOp::matrix_padder.PadBDescriptor_N_K(b_grid_desc);
 
            const auto N = b_grid_desc_n_k.GetLength(I0);
            const auto K = b_grid_desc_n_k.GetLength(I1);
 
            const auto BK0 = K / BK1;
 
            return transform_tensor_descriptor(
                b_grid_desc_n_k,
                make_tuple(make_unmerge_transform(make_tuple(BK0, BK1)),
                           make_pass_through_transform(N)),
                make_tuple(Sequence<1>{}, Sequence<0>{}),
                make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
        }
 
        template <class B1GridDescriptor>
        static constexpr auto MakeB1GridDescriptor_BK0_N_BK1(const B1GridDescriptor& b1_grid_desc)
        {
            const auto b1_grid_desc_n_k = DeviceOp::matrix_padder.PadB1Descriptor_N_K(b1_grid_desc);
 
            const auto N = b1_grid_desc_n_k.GetLength(I0);
            const auto K = b1_grid_desc_n_k.GetLength(I1);
 
            const auto B1K0 = K / B1K1;
 
            return transform_tensor_descriptor(
                b1_grid_desc_n_k,
                make_tuple(make_unmerge_transform(make_tuple(B1K0, B1K1)),
                           make_pass_through_transform(N)),
                make_tuple(Sequence<1>{}, Sequence<0>{}),
                make_tuple(Sequence<0, 2>{}, Sequence<1>{}));
        }
 
        template <class CGridDescriptor>
        static constexpr auto MakeCGridDescriptor_M_N(const CGridDescriptor& c_grid_desc)
        {
            return DeviceOp::matrix_padder.PadCDescriptor_M_N(c_grid_desc);
        }
 
        using AGridDesc_AK0_M_AK1 =
            remove_cvref_t<decltype(MakeAGridDescriptor_AK0_M_AK1(ADesc{}))>;
        using BGridDesc_BK0_N_BK1 =
            remove_cvref_t<decltype(MakeBGridDescriptor_BK0_N_BK1(BDesc{}))>;
        using B1GridDesc_BK0_N_BK1 =
            remove_cvref_t<decltype(MakeB1GridDescriptor_BK0_N_BK1(B1Desc{}))>;
        using CGridDesc_M_N = remove_cvref_t<decltype(MakeCGridDescriptor_M_N(CDesc{}))>;
 
        // GridwiseGemm
        template <index_t MXdlPerWave_>
        using GridwiseGemmBase = GridwiseBatchedGemmSoftmaxGemm_Xdl_CShuffle<
            ADataType, // TODO: distinguish A/B datatype
            GemmAccDataType,
            CShuffleDataType,
            CDataType,
            AElementwiseOperation,
            BElementwiseOperation,
            AccElementwiseOperation,
            B1ElementwiseOperation,
            CElementwiseOperation,
            InMemoryDataOperationEnum::Set,
            AGridDesc_AK0_M_AK1,
            BGridDesc_BK0_N_BK1,
            B1GridDesc_BK0_N_BK1,
            CGridDesc_M_N,
            NumGemmKPrefetchStage,
            BlockSize,
            MPerBlock,
            NPerBlock,
            KPerBlock,
            Gemm1NPerBlock,
            Gemm1KPerBlock,
            AK1,
            BK1,
            B1K1,
            MPerXDL,
            NPerXDL,
            MXdlPerWave_,
            NXdlPerWave,
            Gemm1NXdlPerWave,
            ABlockTransferThreadClusterLengths_AK0_M_AK1,
            ABlockTransferThreadClusterArrangeOrder,
            ABlockTransferSrcAccessOrder,
            ABlockTransferSrcVectorDim,
            ABlockTransferSrcScalarPerVector,
            ABlockTransferDstScalarPerVector_AK1,
            true,
            ABlockLdsExtraM,
            BBlockTransferThreadClusterLengths_BK0_N_BK1,
            BBlockTransferThreadClusterArrangeOrder,
            BBlockTransferSrcAccessOrder,
            BBlockTransferSrcVectorDim,
            BBlockTransferSrcScalarPerVector,
            BBlockTransferDstScalarPerVector_BK1,
            true,
            BBlockLdsExtraN,
            B1BlockTransferThreadClusterLengths_BK0_N_BK1,
            B1BlockTransferThreadClusterArrangeOrder,
            B1BlockTransferSrcAccessOrder,
            B1BlockTransferSrcVectorDim,
            B1BlockTransferSrcScalarPerVector,
            B1BlockTransferDstScalarPerVector_BK1,
            false,
            B1BlockLdsExtraN,
            CShuffleMXdlPerWavePerShuffle,
            CShuffleNXdlPerWavePerShuffle,
            CShuffleBlockTransferClusterLengths_MBlock_MPerBlock_NBlock_NPerBlock,
            CShuffleBlockTransferScalarPerVector_NPerBlock,
            LoopSched,
            matrix_padder.PadN,
            MaskOutUpperTriangle>;
 
        using GridwiseGemm64 = GridwiseGemmBase<math::max(MXdlPerWave64, 1)>;
        using GridwiseGemm32 = GridwiseGemmBase<MXdlPerWave32>;
 
        AGridDesc_AK0_M_AK1 a_grid_desc_ak0_m_ak1;
        BGridDesc_BK0_N_BK1 b_grid_desc_bk0_n_bk1;
        B1GridDesc_BK0_N_BK1 b1_grid_desc_bk0_n_bk1;
        CGridDesc_M_N c_grid_desc_m_n;
        C0MatrixMask c0_matrix_mask;
        typename GridwiseGemm64::DefaultBlock2CTileMap block_2_ctile_map;
        typename GridwiseGemm64::CGridDescriptor_MBlock_MPerBlock_NBlock_NPerBlock
            c_grid_descriptor_mblock_mperblock_nblock_nperblock;
 
        // element-wise op
        AElementwiseOperation a_element_op;
        BElementwiseOperation b_element_op;
        B1ElementwiseOperation b1_element_op;
        CElementwiseOperation c_element_op;
 
        bool has_main_k_block_loop = true;
        bool is_valid              = false;
 
        constexpr Descriptor(ADesc a,
                             BDesc b,
                             B1Desc b1,
                             CDesc c,
                             AElementwiseOperation a_element_op_,
                             BElementwiseOperation b_element_op_,
                             B1ElementwiseOperation b1_element_op_,
                             CElementwiseOperation c_element_op_)
            : a_grid_desc_ak0_m_ak1{MakeAGridDescriptor_AK0_M_AK1(a)},
              b_grid_desc_bk0_n_bk1{MakeBGridDescriptor_BK0_N_BK1(b)},
              b1_grid_desc_bk0_n_bk1{MakeB1GridDescriptor_BK0_N_BK1(b1)},
              c_grid_desc_m_n{MakeCGridDescriptor_M_N(c)},
              block_2_ctile_map{GridwiseGemm64::MakeDefaultBlock2CTileMap(c_grid_desc_m_n)},
              c_grid_descriptor_mblock_mperblock_nblock_nperblock{
                  GridwiseGemm64::MakeCGridDescriptor_MBlock_MPerBlock_NBlock_NPerBlock(
                      c_grid_desc_m_n)},
              has_main_k_block_loop{GridwiseGemm64::CalculateHasMainKBlockLoop(
                  a_grid_desc_ak0_m_ak1.GetLength(I0) * a_grid_desc_ak0_m_ak1.GetLength(I2))},
              c0_matrix_mask{c.GetLength(I1)},
              a_element_op{a_element_op_},
              b_element_op{b_element_op_},
              b1_element_op{b1_element_op_},
              c_element_op{c_element_op_},
              is_valid{false}
        {
            if(get_warp_size() == 64)
            {
                if constexpr(MXdlPerWave64 > 0)
                {
                    is_valid = GridwiseGemm64::CheckValidity(a_grid_desc_ak0_m_ak1,
                                                             b_grid_desc_bk0_n_bk1,
                                                             b1_grid_desc_bk0_n_bk1,
                                                             c_grid_desc_m_n,
                                                             block_2_ctile_map) and
                               IsSupported(a_grid_desc_ak0_m_ak1.GetLength(I1),
                                           b_grid_desc_bk0_n_bk1.GetLength(I1),
                                           a_grid_desc_ak0_m_ak1.GetLength(I0) *
                                               a_grid_desc_ak0_m_ak1.GetLength(I2),
                                           b1_grid_desc_bk0_n_bk1.GetLength(I1)) and
                               GridwiseGemm64::template IsValidCompilationParameter<>();
                }
            }
            else
            {
                if constexpr(MXdlPerWave32 > 0)
                {
                    is_valid = GridwiseGemm32::CheckValidity(a_grid_desc_ak0_m_ak1,
                                                             b_grid_desc_bk0_n_bk1,
                                                             b1_grid_desc_bk0_n_bk1,
                                                             c_grid_desc_m_n,
                                                             block_2_ctile_map) and
                               IsSupported(a_grid_desc_ak0_m_ak1.GetLength(I1),
                                           b_grid_desc_bk0_n_bk1.GetLength(I1),
                                           a_grid_desc_ak0_m_ak1.GetLength(I0) *
                                               a_grid_desc_ak0_m_ak1.GetLength(I2),
                                           b1_grid_desc_bk0_n_bk1.GetLength(I1)) and
                               GridwiseGemm32::template IsValidCompilationParameter<>();
                }
            }
        }
        constexpr bool IsValid() const { return is_valid; }
    };
 
    template <class ADesc, class BDesc, class B1Desc, class CDesc>
    static constexpr auto
    make_descriptor(ADesc a,
                    BDesc b,
                    B1Desc b1,
                    CDesc c,
                    AElementwiseOperation a_element_op   = AElementwiseOperation{},
                    BElementwiseOperation b_element_op   = BElementwiseOperation{},
                    B1ElementwiseOperation b1_element_op = B1ElementwiseOperation{},
                    CElementwiseOperation c_element_op   = CElementwiseOperation{})
    {
        return Descriptor<ADesc, BDesc, B1Desc, CDesc>(
            a, b, b1, c, a_element_op, b_element_op, b1_element_op, c_element_op);
    }
 
    template <class Desc>
    __device__ static void Run(const Desc& desc,
                               const float scale,
                               const ADataType* __restrict__ p_a_grid,
                               const ADataType* __restrict__ p_b_grid,
                               const ADataType* __restrict__ p_b1_grid,
                               CDataType* __restrict__ p_c_grid)
    {
#ifndef __HIPCC_RTC__
        assert(desc.is_valid);
#endif
        using GridwiseGemm = conditional_t<get_warp_size() == 64,
                                           typename Desc::GridwiseGemm64,
                                           typename Desc::GridwiseGemm32>;
        __shared__ char p_shared_block[GridwiseGemm::GetSharedMemoryNumberOfByte()];
        AccElementwiseOperation acc_element_op{scale};
 
        if(desc.has_main_k_block_loop)
        {
            GridwiseGemm::template Run<true>(
                p_a_grid,
                p_b_grid,
                p_b1_grid,
                p_c_grid,
                p_shared_block,
                desc.a_element_op,
                desc.b_element_op,
                acc_element_op,
                desc.b1_element_op,
                desc.c_element_op,
                desc.a_grid_desc_ak0_m_ak1,
                desc.b_grid_desc_bk0_n_bk1,
                desc.b1_grid_desc_bk0_n_bk1,
                desc.c_grid_descriptor_mblock_mperblock_nblock_nperblock,
                desc.block_2_ctile_map,
                desc.c0_matrix_mask);
        }
        else
        {
            GridwiseGemm::template Run<false>(
                p_a_grid,
                p_b_grid,
                p_b1_grid,
                p_c_grid,
                p_shared_block,
                desc.a_element_op,
                desc.b_element_op,
                acc_element_op,
                desc.b1_element_op,
                desc.c_element_op,
                desc.a_grid_desc_ak0_m_ak1,
                desc.b_grid_desc_bk0_n_bk1,
                desc.b1_grid_desc_bk0_n_bk1,
                desc.c_grid_descriptor_mblock_mperblock_nblock_nperblock,
                desc.block_2_ctile_map,
                desc.c0_matrix_mask);
        }
    }
};
 
} // namespace device
} // namespace tensor_operation
} // namespace ck